`timescale 100ns / 100ps

                       
module tb_control
    (   output logic                    clk
        );
//*********************** КОНСТАНТЫ ****************************************************************

//*********************** СОЗДАНИЕ И ОПИСАНИЕ ПЕРЕМЕННЫХ *******************************************
    logic reset_n;
    
    logic [7:0] shutter;
    logic Vldata, Vrdata, Vsample, Vrsync, Vlsync, Vhdata, Vhsync, Vclamp;
    logic frame, line;
    logic adcclk, cdsclk1, cdsclk2;

//********************** БЛОК НЕПРЕРЫВНЫХ НАЗНАЧЕНИЙ ASSIGN ****************************************


//********************** ОПИСАНИЕ ПОДКЛЮЧАЕМЫХ БЛОКОВ ***********************************************

control control_inst
    (   .reset_n    (reset_n),
        .clk        (clk),
        .shutter    (shutter),
        .Vldata     (Vldata),
        .Vrdata     (Vrdata), 
        .Vsample    (Vsample), 
        .Vrsync     (Vrsync), 
        .Vlsync     (Vlsync), 
        .Vhdata     (Vhdata), 
        .Vhsync     (Vhsync), 
        .Vclamp     (Vclamp), 
        .frame      (frame), 
        .line       (line), 
        .adcclk     (adcclk), 
        .cdsclk1    (cdsclk1), 
        .cdsclk2    (cdsclk2)
    );
  
// ********************* БЛОКИ ИНИЦИАЛИЗАЦИИ *******************************************************
    initial begin
        reset_n = 0;
    #25  reset_n = 1;
    end
    
    initial begin        // CLK
        clk = 0;
        forever #5ns clk = ~clk;
    end
    
    initial begin        // CLK
        shutter = 0;
        repeat (240) begin
            #5000;
            shutter = shutter + 1;
        end;
    end    
endmodule